3-Line-to-8-Line Decoders / Demultiplexers

The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binaly select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external

文件：100.23 Kbytes 页数：8 Pages

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Dual 2-line-to-4-line Decoders/Demultiplexers

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：58.93 Kbytes 页数：6 Pages

HITACHIHitachi Semiconductor

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Dual 2-line-to-4-line Decoders / Demultiplexers

The HD74LS139 comprises two individual two-line-to-four-line decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications.

文件：77.15 Kbytes 页数：7 Pages

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Dual 2-line-to-4-line Decoders / Demultiplexers

The HD74LS139 comprises two individual two-line-to-four-line decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications.

文件：77.15 Kbytes 页数：7 Pages

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Dual 2-line-to-4-line Decoders / Demultiplexers

The HD74LS139 comprises two individual two-line-to-four-line decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications.

文件：77.15 Kbytes 页数：7 Pages

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Dual 2-line-to-4-line Decoders / Demultiplexers

The HD74LS139 comprises two individual two-line-to-four-line decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications.

文件：77.15 Kbytes 页数：7 Pages

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Hex Schmitt Trigger Inverters

Hex Schmitt Trigger Inverters

文件：78.89 Kbytes 页数：6 Pages

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Hex Schmitt Trigger Inverters

文件：47.85 Kbytes 页数：5 Pages

HITACHIHitachi Semiconductor

日立日立公司

BCD-to-Decimal Decoders / Drivers(with 15V outputs)

BCD-to-Decimal Decoder/Driver with 15V outputs

文件：67.75 Kbytes 页数：6 Pages

HITACHIHitachi Semiconductor

日立日立公司

BCD-to-Decimal Decoder / Driver (with 15 V outputs)

This BCD-to-decimal decoder / driver consists of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that all outputs remain off for all invalid binary in

文件：88.86 Kbytes 页数：6 Pages

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