8-bit Parallel-out Shift Register

Description This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Features • High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6

文件：51.28 Kbytes 页数：9 Pages

HitachiHitachi Semiconductor

日立日立公司

8-bit Parallel-out Shift Register

Description This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low lev

文件：94.21 Kbytes 页数：7 Pages

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8-bit Parallel-out Shift Register

Description\nThis 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at th •  High Speed Operation: tpd(Clock to Q) = 14.5 ns typ (CL= 50 pF)\n•  High Output Current: Fanout of 10 LSTTL Loads\n•  Wide Operating Voltage: VCC= 2 to 6 V\n•  Low Input Current: 1 µA max\n•  Low Quiescent Supply Current: ICC(static) = 4 µA max;

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8-bit Parallel-out Shift Register

HITACHI

日立

8-bit Parallel-out Shift Register

Description This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low lev

文件：94.21 Kbytes 页数：7 Pages

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瑞萨

8-bit Parallel-out Shift Register

Description This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low lev

文件：94.21 Kbytes 页数：7 Pages

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8-bit Parallel-out Shift Register

文件：145.35 Kbytes 页数：10 Pages

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瑞萨

8-bit Parallel-out Shift Register

文件：145.35 Kbytes 页数：10 Pages

RENESAS

瑞萨

8-bit Parallel-out Shift Register

文件：145.35 Kbytes 页数：10 Pages

RENESAS

瑞萨

8-bit Parallel-out Shift Register

文件：145.35 Kbytes 页数：10 Pages

RENESAS

瑞萨