QUAD SRAMs

• Simultaneous Read and Write SigmaQuad Interface \n• Dual Double Data Rate Interface\n• Pipelined Read operation \n• Fully coherent Read and Write pipelines\n• ZQ mode pin for programmable output drive strength\n• IEEE 1149.1 JTAG-compliant Boundary Scan \n• JEDEC-standard pinout and package \n• Ro;

GSI

On-Chip ECC with virtually zero SER

文件：451.66 Kbytes 页数：31 Pages

GSI

2Mb x 36 and 4Mb x 18 organizations available

文件：368.58 Kbytes 页数：25 Pages

GSI

QUAD SRAMs

• Simultaneous Read and Write SigmaQuad Interface \n• Dual Double Data Rate Interface\n• Pipelined Read operation \n• Fully coherent Read and Write pipelines\n• ZQ mode pin for programmable output drive strength\n• IEEE 1149.1 JTAG-compliant Boundary Scan \n• JEDEC-standard pinout and package \n• Ro;

GSI