QUAD SRAMs

• Simultaneous Read and Write SigmaQuad Interface \n• Dual Double Data Rate Interface\n• Pipelined Read operation \n• Fully coherent Read and Write pipelines\n• ZQ mode pin for programmable output drive strength\n• IEEE 1149.1 JTAG-compliant Boundary Scan \n• JEDEC-standard pinout and package \n• Ro;

GSI

QUAD SRAMs

• Simultaneous Read and Write SigmaQuad Interface \n• Pipelined Read operation \n• ZQ mode pin for programmable output drive strength\n• JEDEC-standard pinout and package \n• RoHS-compliant package available\n;

GSI

JEDEC-standard pinout and package

文件：506.64 Kbytes 页数：29 Pages

GSI

SOIC-8

Gainsil(聚洵)

上传：深圳市信科顺电子有限公司

SOP-8

Gainsil(聚洵)

上传：深圳市信科顺电子有限公司