QUAD SRAMs

• Simultaneous Read and Write SigmaQuad Interface \n• Dual Double Data Rate Interface\n• Pipelined Read operation \n• Fully coherent Read and Write pipelines\n• ZQ mode pin for programmable output drive strength\n• IEEE 1149.1 JTAG-compliant Boundary Scan \n• JEDEC-standard pinout and package \n• Ro;

GSI