18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22883 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22883 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22882 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22883 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22882 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22883 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22883 Mbytes 页数：37 Pages

GSI

18Mb SyncBurst SRAMs

Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Inte

文件：1.22882 Mbytes 页数：37 Pages

GSI

SYNCBURST SRAMs

• Industry-standard Synchronous Burst Interface\n• LBO pin for Linear or Interleaved Burst mode\n• Internal self-timed write cycle\n• JEDEC-standard pinout and package\n• RoHS-compliant package available;

GSI