首页 >GS8161E18DD-333I>规格书列表
零件编号 | 下载&订购 | 功能描述 | 制造商&上传企业 | LOGO |
---|---|---|---|---|
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
GS8161E18DD-333I | 18Mb SyncBurst SRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | |
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI | ||
18MbSyncBurstSRAMs Features •FTpinforuser-configurableflowthroughorpipelineoperation •DualCycleDeselect(DCD)operation •IEEE1149.1JTAG-compatibleBoundaryScan •2.5Vor3.3V+10%/–10%corepowersupply •2.5Vor3.3VI/Osupply •LBOpinforLinearorInterleavedBurstmode •Inte | GSI GSI Technology | GSI |
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相关库存
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