NBT SRAMs

• NBT functionality allows zero wait read-write-read bus utilization\n• Fully pin-compatible NtRAM™, NoBL™, and ZBT™ SRAMs\n• LBO pin for Linear or Interleaved Burst mode\n• Byte Write (BW) and/or Global Write (GW) operation\n• Internal self-timed write cycle\n• Automatic power-down for portable app;

GSI

18Mb Pipelined and Flow Through Synchronous NBT SRAMs

文件：240.77 Kbytes 页数：23 Pages

GSI

18Mb Pipelined and Flow Through Synchronous NBT SRAMs

文件：240.77 Kbytes 页数：23 Pages

GSI

TSSOP-14

Gainsil(聚洵)

上传：深圳市信科顺电子有限公司

SOIC-8

Gainsil(聚洵)

上传：深圳市信科顺电子有限公司