Logic Level TRIACs

Fagor

法格电子

SURFACE MOUNT TRIAC

文件：158.74 Kbytes 页数：5 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

N-Channel Enhancement-Mode Vertical DMOS FETs

General Description This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and po

文件：433.97 Kbytes 页数：2 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

文件：433.5 Kbytes 页数：2 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

文件：433.5 Kbytes 页数：2 Pages

SUTEX