3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：246.65 Kbytes 页数：6 Pages

Fairchild

仙童半导体

3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：340.69 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

3.3V LVDS 4位高速差分接收器

此四路接收器利用低压差分信号(LVDS)技术，设计用于高速互连。 该接收器可将具有100mV典型差分输入阈值的LVDS电平转换为LVTTL信号电平。 LVDS即使在高频下也可以超低功耗提供EMI低辐射。 该器件是时钟和数据高速传输的理想之选。 FIN1032可与其配套驱动器FIN1031或飞兆的任何其他LVDS驱动器配对。 •数据速率大于400Mbs\n•3.3V电源操作\n•0.4ns的最大差分脉冲偏斜\n•2.5ns最大传播延迟\n•低功耗\n•断电保护\n•为开路、短路或中断情况提供故障安全保护\n•符合或超越TIA/EIA-644 LVDS标准\n•引脚兼容等效RS-422和LVPECL器件\n•16引脚SOIC和TSSOP封装可节省空间;

ONSEMI

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3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：340.69 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：246.65 Kbytes 页数：6 Pages

Fairchild

仙童半导体

3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：246.65 Kbytes 页数：6 Pages

Fairchild

仙童半导体

3.3V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low powe

文件：340.69 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16TSSOP

ONSEMI

安森美半导体

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16TSSOP

ONSEMI

安森美半导体

Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16SOIC

ONSEMI

安森美半导体