LVDS 1-Bit High Speed Differential Receiver

Description This single receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power di

文件：1.01979 Mbytes 页数：7 Pages

Fairchild

仙童半导体

LVDS 1-Bit, High-Speed Differential Receiver

文件：977.42 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

3.3V LVDS 1 位高速差分接收器

该单通道接收器专为采用低压差分信号(LVDS)技术进行高速互连而设计。 该接收器会通过阈值为100 mV的典型差分输入将LVDS电平转换为LVTTL信号电平。 LVDS即使在高频下也可以超低功耗提供EMI低辐射。 该器件是时钟或数据高速传输的理想之选。 FIN1002可与其配套驱动器FIN1001或任何其他LVDS驱动器配对。 •数据速率大于400Mbs\n•3.3V电源操作\n•0.4ns最大脉冲偏斜\n•2.5ns最大传播延迟\n•总线引脚ESD (HBM)保护超过10kV\n•关断耐过压输入和输出\n•为开路、无驱动、短接或端接情形提供故障安全保护\n•VCC< 1.5V时高阻抗输出\n•符合或超越TIA/EIA-644 LVDS标准\n•节省空间的5引线SOT23封装;

ONSEMI

安森美半导体

LVDS 1-Bit High Speed Differential Receiver

Description This single receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power di

文件：1.01979 Mbytes 页数：7 Pages

Fairchild

仙童半导体

LVDS 1-Bit High Speed Differential Receiver

Description This single receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power di

文件：1.01979 Mbytes 页数：7 Pages

Fairchild

仙童半导体

LVDS 1-Bit, High-Speed Differential Receiver

文件：977.42 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

LVDS 1-Bit, High-Speed Differential Receiver

文件：977.42 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

Package：SC-74A，SOT-753；包装：管件 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/1 SOT23-5

ONSEMI

安森美半导体

Package：SC-74A，SOT-753；包装：管件 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/1 SOT23-5

ONSEMI

安森美半导体