丝印：F17；Package：PowerDI123；1.0A SURFACE MOUNT SCHOTTKY BARRIER RECTIFIER PowerDI123

Features Guard Ring Die Construction for Transient Protection Low Power Loss, High Efficiency Patented Interlocking Clip Design for High Surge Current Capacity Lead-Free Finish; RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Qualified to AEC-Q101 Standards f

文件：395.56 Kbytes 页数：6 Pages

DIODES

美台半导体

丝印：F17A；Package：PowerDI123；2.0A SURFACE MOUNT SCHOTTKY BARRIER RECTIFIER POWERDI123

Features • Guard Ring Die Construction for Transient Protection • Low Power Loss, High Efficiency • Patented Interlocking Clip Design for High Surge Current Capacity • Lead-Free Finish; RoHS Compliant (Notes 1 & 2) • Halogen and Antimony Free. “Green” Device (Note 3) • Qualified to AEC-Q101

文件：316.89 Kbytes 页数：6 Pages

DIODES

美台半导体

丝印：F174A；Package：SOIC；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：F174A；Package：SOIC；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：F174A；Package：SOIC；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：F174A；Package：SOIC；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

Ideal for Multi-Carrier Systems

FEATURES  Ideal for Multi-Carrier Systems  Lowside or Highside LO  11.8dB Gain  Ultra linear +43dBm IP3O using HS LO or +37.5 dBm IP3O using LS LO  9.7dB NF  200 Ω output impedance  Wide flat-performance IF BW  Drives ADC directly for DPD applications  Low Power Consumption  5

文件：1.3235 Mbytes 页数：25 Pages

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