Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable Logic Device Family

文件：715.02 Kbytes 页数：46 Pages

Altera

阿尔特

Programmable logic , 32 macrocells, 2 logic array blocks, 34 I/O pins, 10ns

Features...■ High–performance, low–cost CMOS EEPROM–based programmable logic devices (PLDs) built on a MAX architecture\n■ 3.3-V in-system programmability(ISP) through the built–in IEEE Std. 1149.1 Joint Test ActionGroup (JTAG) interface with advanced pin-locking capability\n– ISP circuitry complian

Intel

英特尔

EPM3032ATC4410N - 逻辑芯片, 系统内编程, PLD, 3.3V, 3032, TQFP44

The EPM3032ATC4410N is an EEPROM Complex Programmable Logic Device IC with 600 usable gates and 32 macro cells. MAX 3000A CPLD is a high-performance, CMOS EEPROM-based programmable logic devices (PLDs) built on a MAX® architecture. Programmable interconnect array (PIA) continuous routing structure f ·Enhanced ISP algorithm for faster programming\n·Hot-socketing support\n·PCI compatible\n·Bus-friendly architecture including programmable slew-rate control\n·Open-drain output option\n·Programmable power-saving mode for a power reduction of over 50% in each macro cell\n·Programmable security bi;

Intel

英特尔

High–performance, low–cost CMOS EEPROM–based programmable

Intel

英特尔