MAX II Device Family Data Sheet

Features ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 2 mA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array block (LAB) ■ UFM block up to 8 Kbits for non-volat

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Intel

英特尔

MAX II Device Family

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

文件：1.20992 Mbytes 页数：86 Pages

Altera

阿尔特

MAX II Device Family

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

文件：1.20992 Mbytes 页数：86 Pages

Altera

阿尔特

MAX II Device Family

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

文件：1.20992 Mbytes 页数：86 Pages

Altera

阿尔特

MAX II Device Family

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

文件：1.20992 Mbytes 页数：86 Pages

Altera

阿尔特

MAX II Device Handbook

Features The MAX II CPLD has the following features: ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 25 μA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array block

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Altera

阿尔特

Section I. MAX II Device Family

Features The MAX II CPLD has the following features: ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 25 μA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array bloc

文件：987.8 Kbytes 页数：88 Pages

Altera

阿尔特

Section I. MAX II Device Family Data Sheet

Features The MAX II CPLD has the following features: ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 25 µA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array block

文件：988.19 Kbytes 页数：88 Pages

Altera

阿尔特

MAX II Device Family Data Sheet

Features ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 2 mA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array block (LAB) ■ UFM block up to 8 Kbits for non-volat

文件：622.93 Kbytes 页数：101 Pages

Intel

英特尔

MAX II Device Family

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

文件：1.20992 Mbytes 页数：86 Pages

Altera

阿尔特