Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95894 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

文件：1.95316 Mbytes 页数：128 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

Intel

英特尔

1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet

The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks, a configuration controller and a flash memory. The flash memory is used to store conf

文件：456.96 Kbytes 页数：34 Pages

Altera

阿尔特

Embedded Programmable Logic Device Family

General Description Altera’s FLEX 10K devices are the industry’s first embedded PLDs. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the F

文件：1.69424 Mbytes 页数：128 Pages

Altera

阿尔特