DSP45-16AR

Standard Rectifier

Features ●InternationalstandardpackagesJEDECTO-247ADandTO-268AAsurfacemountable ●Forsingleandthreephasebridgeconfiguration ●Planarpassivatedchips ●EpoxymeetsUL94V-0flammabilityclassification ●VersionARisolatedandULregisteredE153432

DSP45-16AT

Phase-leg Rectifier Diode

Features ●InternationalstandardpackagesJEDECTO-247ADandTO-268AAsurfacemountable ●Forsingleandthreephasebridgeconfiguration ●Planarpassivatedchips ●EpoxymeetsUL94V-0flammabilityclassification ●VersionARisolatedandULregisteredE153432

DSP45-16AZ

Standard Rectifier

Phaseleg Features/Advantages: ●Planarpassivatedchips ●Verylowleakagecurrent ●Verylowforwardvoltagedrop ●Improvedthermalbehaviour Applications: ●Diodeformainrectification ●Forsingleandthreephase bridgeconfigurations

DSP45-18A

Standard Rectifier

Phaseleg Features/Advantages: ●Planarpassivatedchips ●Verylowleakagecurrent ●Verylowforwardvoltagedrop ●Improvedthermalbehaviour Applications: ●Diodeformainrectification ●Forsingleandthreephase bridgeconfigurations

DSP-501N

DIA SURGE SUPPRESSOR (DSS)

■Features ●Surgeprotectionfortelephonelines.(telephone,modem,facsimileetc.) ●Surgeprotectionfortelecommunicationlines.(computeretc.) ●SomemodelsarerecognizedbyUL.

DSP56000

SYMPHONYTM AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

FEATURES •Efficient,objectcodecompatiblewiththe24-bitDSP56000corefamilyengine •Upto44MillionInstructionsPerSecond(MIPS)—22.7nsinstructioncycleat 88MHz •HighlyparallelinstructionsetwithuniqueDSPaddressingmodes •Two56-bitaccumulatorsincludingextensionbyte

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DSP56001

DIGITAL STEREO 10-BAND GRAPHIC EQUALIZER USING THE DSP56001

DSP56001

24-Bit General Purpose Digital Signal Processor

TheDSP56001isamemberofMotorola’sfamilyofHCMOS,low-power,generalpurposeDigitalSignalProcessors.TheDSP56001features512wordsoffullspeed,on-chipprogramRAM(PRAM)memory,two256worddataRAMs,twopreprogrammeddataROMs,andspecialon-chipbootstraphardwaretopermitconv

DSP56001

24-Bit General Purpose Digital Signal Processor

DESCRIPTION TheDSP56001isavailablein132pinsurfacemount(CQFPand PQFP)oran88-pinpin-gridarraypackaging.Itsinputandoutputsignals areorganizedintosevenfunctionalgroupswhicharelistedbelow andshowninFigure1. PortAAddressandDataBuses PortABusControl Interr

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DSP56001A

24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES DigitalSignalProcessingCore •Efficient,objectcodecompatible,24-bit56000familyDSPengine •Upto16.5MillionInstructionsPerSecond(MIPS)—60.6nsinstructioncycleat33MHz •Upto99MillionOperationsPerSecond(MOPS)at33MHz •Executesa1024-pointcomplexFastFo

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