DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI

德州仪器

3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

文件：1.19671 Mbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

文件：1.19671 Mbytes 页数：25 Pages

TI

德州仪器

丝印：DSLVDS1048；Package：TSSOP；3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

文件：1.19671 Mbytes 页数：25 Pages

TI

德州仪器

3.3V LVDS 四通道高速差动线路接收器

DSLVDS1048 器件是一款四路 CMOS 直通差动线路接收器，专为需要超低功耗和高数据速率的 应用 而设计。该器件旨在使用低电压差动信号 (LVDS) 技术支持超过 400Mbps (200MHz) 的数据速率。\n\nDSLVDS1048 接受低电压（350mV 典型值）差动输入信号，并将其转换为 3V CMOS 输出电平。该接收器支持 TRI-STATE 功能，可用于对输出进行多路复用。该接收器还支持开路、短路及终止 (100Ω) 输入失效防护。该接收器的输出在所有失效防护条件下均为高电平。DSLVDS1048 采用了直通引脚排列，可简化 PCB 布局。\n\nEN 和 EN* 输入 • 旨在用于信号速率高达 400Mbps 的应用\n• 直通引脚排列可简化 PCB 布局\n• 150ps 通道到通道偏斜（典型值）\n• 100ps 差动偏斜（典型值）\n• 2.7ns 最大传播延迟\n• 3.3V 电源设计\n• 在断电模式下，LVDS 输入端具有高阻抗\n• 低功耗设计（3.3V 静态条件下为 40mW）\n• 能够与现有 5V LVDS 驱动器交互操作\n• 接受小摆幅（350mV 典型值）差动信号电平\n• 支持输入失效防护 \n• 开路、短路及终止失效防护\n \n• 0V 至 −100mV 阈值区域\n• 工作温度范围：-40°C 至 +85°C\n• 符合或超;

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德州仪器

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER FULL 0/4 16TSSOP

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德州仪器