DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器

3V LVDS Single CMOS Differential Line Receiver

文件：1.03991 Mbytes 页数：17 Pages

TI

德州仪器

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

文件：1.01883 Mbytes 页数：17 Pages

TI

德州仪器

3V LVDS Single CMOS Differential Line Receiver

文件：241.9 Kbytes 页数：10 Pages

NSC

国半

3V LVDS Single CMOS Differential Line Receiver

文件：684.69 Kbytes 页数：9 Pages

NSC

国半

丝印：90LV018ATM；Package：SOIC；DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器

丝印：90LV018ATM；Package：SOIC；DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器

丝印：90LV018ATM；Package：SOIC；DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器

丝印：90LV018ATM；Package：SOIC；DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器

丝印：90LV018ATM；Package：SOIC；DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

1FEATURES 2• >400 Mbps (200 MHz) Switching Rates • 50 ps Differential Skew (Typical) • 2.5 ns Maximum Propagation Delay • 3.3V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18mW @ 3.3V Static) • Interoperable with Existing 5V LVDS

文件：744.57 Kbytes 页数：20 Pages

TI

德州仪器