DS90C383/DS90CF384 3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

General Description The DS90C383 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bit

文件：811.57 Kbytes 页数：30 Pages

TI

德州仪器

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：410.45 Kbytes 页数：22 Pages

TI

德州仪器

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：344.12 Kbytes 页数：20 Pages

NSCNational Semiconductor (TI)

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丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AMTD；Package：TSSOP；DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best-in-Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption 7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XG

文件：1.19466 Mbytes 页数：26 Pages

TI

德州仪器

丝印：DS90CF384AQMT；Package：TSSOP；DS90CF384AQ 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz

1FEATURES 2• Automotive Grade Device, AEC-Q100 Grade 3 Qualified • Operating Temperature Range: –40°C to +85°C • 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption

文件：824.84 Kbytes 页数：18 Pages

TI

德州仪器