32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM

文件：1.12165 Mbytes 页数：66 Pages

AMD

超威半导体

32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM

文件：1.05465 Mbytes 页数：64 Pages

AMD

超威半导体

32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit)

文件：1.04892 Mbytes 页数：64 Pages

AMD

超威半导体

MID RANGE DISTANCE SENSORS

文件：628.69 Kbytes 页数：8 Pages

SICK

西克

MID RANGE DISTANCE SENSORS

文件：1.72999 Mbytes 页数：7 Pages

SICK

西克

丝印：DL321；Package：8DIP；Green Mode Power Switch

Description Each product in the FSDx321 (x for H, L) family consists of an integrated Pulse Width Modulator (PWM) and SENSEFET, and is specifically designed for high performance offline Switch Mode Power Supplies (SMPS) with minimal external components. Both devices are integrated high voltag

文件：315.87 Kbytes 页数：16 Pages

ONSEMI

安森美半导体

丝印：DL348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DL348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DL348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器

丝印：DL348；Package：TSSOP；QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS

FEATURES · Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard · Single-Channel Signaling Rates up to 560 Mbps · -4 V to 5 V Common-Mode Input Voltage Range · Flow-Through Architecture · Active Failsafe Assures a High-level Output When an Input Signal Is not Present · SN65LVD

文件：740.2 Kbytes 页数：30 Pages

TI

德州仪器