16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器

16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：629.74 Kbytes 页数：26 Pages

TI

德州仪器

16-BIT SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL VOLTAGE OUTPUT

文件：423.15 Kbytes 页数：21 Pages

TI

德州仪器

16-BIT,SINGLE CHANNEL,PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

文件：1.0573 Mbytes 页数：26 Pages

TI

德州仪器

具有 1.8V 兼容并行接口、轨到轨电压输出的低功耗 16 位数模转换器

The DAC8541 is a low-power, single channel, 16-bit, voltage output DAC. Its on-chip precision output amplifier allows rail-to-rail voltage swing to be achieved at the output. The DAC8541 utilizes a 16-bit parallel interface and features additional powerdown function pins as well as hardware-enabled, • Micropower Operation: 250 uA at 5 V AVDD\n• Power-On Reset to Min-Scale\n• 16-Bit Monotonic\n• Settling Time: 10 us to ±0.003% FSR\n• 16-Bit Parallel Interface\n• On-Chip Output Buffer Amplifier With Rail-to-Rail Operation\n• Hardware Reset to Min-Scale or Mid-Scale\n• Double-Buffered Architec;

TI

德州仪器

16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：629.74 Kbytes 页数：26 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP(PBS)；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：629.74 Kbytes 页数：26 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP(PBS)；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：629.74 Kbytes 页数：26 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器