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型号	下载订购	功能描述	制造商上传企业	LOGO
CY7C25652KV18	文件：496.67 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 文件：496.67 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-400BZC	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-400BZI	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-400BZXC	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-400BZXI	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-450BZC	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-450BZI	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-450BZXC	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-500BZC	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C25652KV18-500BZI	文件：496.32 Kbytes Page：31 Pages	72-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Functional Description The CY7C25632KV18 and CY7C25652KV18 are 1.8 V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has 文件：496.32 Kbytes 页数：31 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

技术参数

合格汽车：
否
突发长度（字）：
4
密度 (Kb)：
73728
Density (Mb)：
72
频率 (MHz)：
400
最高工作温度 (°C)：
70
Max. Operating VCCQ (V)：
1.90
最高工作电压 (V)：
1.90
最低工作温度 (°C)：
0
Min. Operating VCCQ (V)：
1.40
最低工作电压 (V)：
1.70
组织 (X x Y)：
2Mb x 36
Part Family：
QDR-II+
Tape & Reel：
否
温度分类：
商用

供应商	型号	品牌	批号	封装	库存	备注	价格
深圳市毅创腾电子科技有限公司	CY7C25652KV18-550BZXI	Cypress		165-FBGA	1200	Cypress一级分销,原装原盒原包装!	询价
上海专毅电子科技有限公司	CY7C25652KV18-500BZXI	CYPRESS	17+	NA	9988	全新原装现货,请联系18721787578唐先生	询价
深圳市正迈科技有限公司	CY7C25652KV18-500BZI	CY	23+	NA	3200	专业电子元器件供应链正迈科技特价代理特价，原装元器件供应，支持开发样品	询价
千层芯半导体(深圳)有限公司	CY7C25652KV18-500BZXI	DEI	24+	SMD	1680	一级代理原装进口现货	询价
深圳市华来深电子有限公司	CY7C25652KV18-400BZI	Cypress	23+	FBGA	8650	受权代理!全新原装现货特价热卖!	询价
深圳市华斯顿科技有限公司	CY7C25652KV18-400BZC	CYPRESS	25+23+	BGA	23127	绝对原装正品全新进口深圳现货	询价
深圳诚思涵科技有限公司	CY7C25652KV18-400BZI	CYPRESS	17+	BGA	60000	保证进口原装可开17%增值税发票	询价
深圳市宇集芯电子有限公司	CY7C25652KV18-400BZXI	CYPRESS	24+	BGA	90000	进口原装现货假一罚十价格合理	询价
深圳市昊创电子有限公司	CY7C25652KV18-500BZXI	CypressSemiconductorCorp	19+		68000	原装正品价格优势	询价
深圳市正纳电子有限公司	CY7C25652KV18-400BZI	CYPRESS	ROHS+Original	NA	1221	专业电子元器件供应链/QQ 350053121 /正纳电子	询价

更多CY7C25652KV18供应商更新时间2025-10-8 10:20:00

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