144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)

Functional Description The CY7C1663KV18, and CY7C1665KV18 are 1.8-V synchronous pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has

文件：779.75 Kbytes 页数：31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)

Functional Description The CY7C1663KV18, and CY7C1665KV18 are 1.8-V synchronous pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has

文件：779.75 Kbytes 页数：31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Synchronous SRAM

Infineon

英飞凌

Package：165-LBGA；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 144MBIT PARALLEL 165FBGA

Cypress Semiconductor Corp

Package：165-LBGA；包装：托盘 类别：集成电路（IC） 存储器 描述：IC SRAM 144MBIT PARALLEL 165FBGA

Cypress Semiconductor Corp