144-Mbit DDR II SRAM Two-Word Burst Architecture

Functional Description The CY7C1618KV18, and CY7C1620KV18 are 1.8-V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Addresses for read and write are latched on alternate ris

文件：753 Kbytes 页数：32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

144-Mbit DDR II SRAM Two-Word Burst Architecture

文件：1.22023 Mbytes 页数：32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

DDR-II CIO

Infineon

英飞凌

Package：165-LBGA；包装：托盘 类别：集成电路（IC） 存储器 描述：IC SRAM 144MBIT PARALLEL 165FBGA

Cypress Semiconductor Corp