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CY7C1363B	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100AC	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100AI	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100AJC	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100AJI	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100BGC	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-100BGI	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-117AC	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-117AI	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1363B-117AJC	文件：856.25 Kbytes Page：34 Pages	9-Mbit (256K x 36/512K x 18) Flow-Through SRAM Functional Description[1] The CY7C1361B/CY7C1363B is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flow through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counte 文件：856.25 Kbytes 页数：34 Pages	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS

技术参数

存储器格式：
SRAM
技术：
SRAM - 同步
存储容量：
9Mb （512K x 18）
时钟频率：
100MHz
访问时间：
8.5ns
存储器接口：
并联
电压 - 电源：
3.135V ~ 3.6V
工作温度：
0°C ~ 70°C（TA）
安装类型：
表面贴装
封装/外壳：
100-LQFP
供应商器件封装：
100-TQFP（14x20）

供应商	型号	品牌	批号	封装	库存	备注	价格
深圳市毅创腾电子科技有限公司	CY7C1363B	Cypress		QFP	350	Cypress一级分销,原装原盒原包装!	询价
贸泽芯城（深圳）电子科技有限公司	CY7C1363B	CYPRESS/赛普拉斯	23+		10000	原厂授权一级代理,专业海外优势订货,价格优势、品种	询价
深圳市福安瓯科技有限公司	CY7C1363B-133AC	CYPRESS	25+	QFP	1250	大量现货库存,提供一站式服务!	询价
深圳市卓越微芯电子有限公司	CY7C1363B-133AC	CY	25+	TQFP100	98	百分百原装正品真实公司现货库存本公司只做原装可	询价
深圳市一线半导体有限公司	CY7C1363B-133AC	CYPRESS	24+	QFP	78		询价
芯有半导体（深圳）有限公司	CY7C1363B-133AC	CY	0430/0309	QFP100	3300	全新原装绝对自己公司现货特价!	询价
深圳市欧立现代科技有限公司	CY7C1363B-133AXC	CYRESS	24+	TQFP	6980	原装现货,可开13%税票	询价
上海专毅电子科技有限公司	CY7C1363B-100AC	CYPRESS	17+	QFP	12000	只做全新进口原装,现货库存	询价
深圳市正迈科技有限公司	CY7C1363B-133AC	CY	23+	NA	27	专业电子元器件供应链正迈科技特价代理特价，原装元器件供应，支持开发样品	询价
上海意淼电子科技有限公司	CY7C1363B-100AC	AD	23+	NA	6500	全新原装假一赔十	询价

更多CY7C1363B供应商更新时间2026-1-29 16:20:00

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