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CY7C1347G-200BZXC

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-200BZXI

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250AXC

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250AXI

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BGC

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BGI

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BGXC

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BGXI

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BZC

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1347G-250BZI

4-Mbit (128K x 36) Pipelined Sync SRAM

Functional Description The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous i

文件:1.02152 Mbytes 页数:21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

技术参数

  • 存储器格式:

    SRAM

  • 技术:

    SRAM - 同步

  • 存储容量:

    4.5Mb (128K x 36)

  • 时钟频率:

    100MHz

  • 访问时间:

    4.5ns

  • 存储器接口:

    并联

  • 电压 - 电源:

    3.15V ~ 3.6V

  • 工作温度:

    0°C ~ 70°C(TA)

  • 安装类型:

    表面贴装

  • 封装/外壳:

    100-LQFP

  • 供应商器件封装:

    100-TQFP(14x20)

供应商型号品牌批号封装库存备注价格
24+
TQFP
6980
原装现货,可开13%税票
询价
CYPRESS
2138+
QFP
8960
专营BGA,QFP原装现货,假一赔十
询价
Cypress
25+
QFP
6
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
CYP
24+
N/A
5650
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
CYPRESS
17+
QFP100
6200
100%原装正品现货
询价
CYPRESS
2015+
SOP/QFP/PLCC
19889
一级代理原装现货,特价热卖!
询价
CYPRESS
24+
LQFP
10
询价
CYPRESS
2016+
QFP
3000
本公司只做原装,假一罚十,可开17%增值税发票!
询价
Cypress
23+
100-LQFP(14x20)
39257
专业分销产品!原装正品!价格优势!
询价
CY
23+
QFP
5000
原装正品,假一罚十
询价
更多CY7C1347G供应商 更新时间2026-1-30 16:04:00