4-Mbit (256 K 횞 18) Flow-Through Sync SRAM

Functional Description The CY7C1325H is a 256 K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2 bit on-chip counter captures the first address in a burst and increments

文件：731.71 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256 K 횞 18) Flow-Through Sync SRAM

Functional Description The CY7C1325H is a 256 K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2 bit on-chip counter captures the first address in a burst and increments

文件：731.71 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256 K × 18) Flow-Through Sync SRAM

Infineon

英飞凌

Synchronous SRAM

Infineon

英飞凌

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 4.5MBIT PARALLEL 100TQFP

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司