256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：270.78 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Infineon

英飞凌

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：270.78 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：270.78 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：270.78 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：270.78 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre

文件：339.75 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre

文件：339.75 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre

文件：339.75 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous 3.3V Cache RAM

Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre

文件：339.75 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司