8-BIT LATCHED TRANSCEIVER WITH 3-STATE OUTPUTS

Function and Pinout Compatible With FCT and F Logic 25- Output Series Resistors to Reduce Transmission-Line Reflection Noise Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Part

文件：345.18 Kbytes 页数：14 Pages

TI

德州仪器

8-Bit Latched Transceiver

文件：55.49 Kbytes 页数：6 Pages

TI

德州仪器

8-BIT LATCHED TRANSCEIVER WITH 3-STATE OUTPUTS

Function and Pinout Compatible With FCT and F Logic 25- Output Series Resistors to Reduce Transmission-Line Reflection Noise Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Part

文件：345.18 Kbytes 页数：14 Pages

TI

德州仪器

8-BIT LATCHED TRANSCEIVER WITH 3-STATE OUTPUTS

文件：619.07 Kbytes 页数：14 Pages

TI

德州仪器

8-Bit Latched Transceiver

文件：55.49 Kbytes 页数：6 Pages

TI

德州仪器

8-Bit Latched Transceiver

文件：55.49 Kbytes 页数：6 Pages

TI

德州仪器

8-Bit Latched Transceiver

文件：55.49 Kbytes 页数：6 Pages

TI

德州仪器

具有三态输出和串联阻尼电阻的八路寄存收发器

The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable (LEAB\\, LEBA\\) and output enable (OEAB\\, OEBA\\) inputs permit each latch set to have independent control of inputting and outputting in either direction of data flow. For example, for data • Function and Pinout Compatible With FCT and F Logic\n• Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions\n• Ioff Supports Partial-Power-Down Mode Operation\n• Fully Compatible With TTL Input and Output Logic Levels\n• Separation Controls for Data Flow in Each Direction\n• ESD Pr;

TI

德州仪器

Package：24-SSOP（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 5.25V 24SSOP

TI2

德州仪器

Package：24-SSOP（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 5.25V 24SSOP

TI2

德州仪器