24-bit ADC with Ultra-low-noise Amplifier

CS5530 向广受欢迎的集成Delta Sigma 模/数转换器 CS5531/32/33/34 系列的用户提供了一个成本更低的选项。保留了同样的低噪性能和输出字速率灵活性，但减少了一些功能集。通过高性能斩波稳定式测量放大器中单差分输入通道和固定的 64x 增益，噪音性能在 0.01 Hz 时可以低至 12 nV/√Hz。同时还提供了数字标度功能，该功能可以额外提供最大 40 的有效增益。Delta Sigma 调制器和产品全系列使用的调制器完全相同，拥有同样出色的 50/60 Hz 抑制。用户可选的输出字速率范围也没有改变，当主时钟的频率是 4.9152 MHz 时，介于 6.25 和 3

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24-bit ADC with Ultra-low-noise Amplifier

General Description The CS5530 is a highly integrated ΔΣ Analog-to-Digital Converter (ADC) which uses charge-balance techniques to achieve 24-bit performance. The ADC is optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applic

文件：286.19 Kbytes 页数：36 Pages

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24-bit ADC with Ultra-low-noise Amplifier

General Description The CS5530 is a highly integrated ΔΣ Analog-to-Digital Converter (ADC) which uses charge-balance techniques to achieve 24-bit performance. The ADC is optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applic

文件：286.19 Kbytes 页数：36 Pages

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24-bit ADC with Ultra-low-noise Amplifier

General Description The CS5530 is a highly integrated ΔΣ Analog-to-Digital Converter (ADC) which uses charge-balance techniques to achieve 24-bit performance. The ADC is optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applic

文件：286.19 Kbytes 页数：36 Pages

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16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：907 Kbytes 页数：52 Pages

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16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：907 Kbytes 页数：52 Pages

CIRRUS

凌云逻辑

16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：907 Kbytes 页数：52 Pages

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24-bit ?誇 ADCs with Ultra-low-noise PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：764.29 Kbytes 页数：50 Pages

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16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：907 Kbytes 页数：52 Pages

CIRRUS

凌云逻辑

16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA

General Description The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, proc

文件：907 Kbytes 页数：52 Pages

CIRRUS

凌云逻辑