1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：90.91 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：90.91 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：90.91 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：91.11 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：91.11 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：91.11 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：392.18 Kbytes 页数：32 Pages

CIRRUS

凌云逻辑

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：392.18 Kbytes 页数：32 Pages

CIRRUS

凌云逻辑

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

文件：392.18 Kbytes 页数：32 Pages

CIRRUS

凌云逻辑

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

文件：92.56 Kbytes 页数：3 Pages

CIRRUS

凌云逻辑