CDCE18005中文资料具有分频器的 5/10 路输出时钟缓冲器数据手册TI规格书

描述 Description

The CDCE18005 is a high performance clock distributor featuring a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. Specifically tailored for buffering clocks for data converters and high-speed digital signals, the CDCE18005 achieves low additive jitter in the 50 fs RMS

range. The clock distribution block includes five individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS). Each output can also be programmed to a unique output frequency (up to 1.5 GHz(2)

The CDCE18005 is a high performance clock distributor featuring a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. Specifically tailored for buffering clocks for data converters and high-speed digital signals, the CDCE18005 achieves low additive jitter in the 50 fs RMS

range. The clock distribution block includes five individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS). Each output can also be programmed to a unique output frequency (up to 1.5 GHz(2)

特性 Features

• Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling
• Fully Configurable Outputs Including Frequency, Output Format, and Output Skew
• Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs and the Outputs
• Clock Generation Via AT-Cut Crystal
• Integrated EEPROM Determines Device Configuration at Power-up
• Low Additive Jitter Performance
• Universal Output Blocks Support up to 5 Differential, 10 Single-ended, or Combinations of Differential or Single-ended:
• Low Additive Jitter
• Output Frequency up to 1.5 GHz
• LVPECL, LVDS, LVCMOS, and Special High Output Swing Modes
• Independent Output Dividers Support Divide Ratios from 1–80
• Independent limited Coarse Skew Control on all Outputs

• Flexible Inputs:
• Two Universal Differential Inputs Accept Frequencies up to 1500 MHz (LVPECL), 800 MHz (LVDS), or 250 MHz (LVCMOS).
• One Auxiliary Input Accepts Crystal. Auxiliary Input Accepts Crystals in the Range of 2 MHz–42 MHz
• Clock Generator Mode Using Crystal Input.

• Typical Power Consumption 1W at 3.3V
• Offered in QFN-48 Package
• ESD Protection Exceeds 2kV HBM
• Industrial Temperature Range –40°C to 85°C

简介

CDCE18005属于集成电路（IC）的时钟发生器PLL频率合成器。由TI制造生产的CDCE18005时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。