CDC208DWR.A

丝印：CDC208；Package：SOIC；DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low-SkewPropagationDelay SpecificationsforClock-Driver Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise EPIC(Enhanced-PerformanceImplanted C

CDC208NS

丝印：CDC208；Package：SOP；DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low-SkewPropagationDelay SpecificationsforClock-Driver Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise EPIC(Enhanced-PerformanceImplanted C

CDC208NS.A

丝印：CDC208；Package：SOP；DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low-SkewPropagationDelay SpecificationsforClock-Driver Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise EPIC(Enhanced-PerformanceImplanted C

CDC208NSR

丝印：CDC208；Package：SOP；DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low-SkewPropagationDelay SpecificationsforClock-Driver Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise EPIC(Enhanced-PerformanceImplanted C

CDC208NSR.A

丝印：CDC208；Package：SOP；DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low-SkewPropagationDelay SpecificationsforClock-Driver Applications TTL-CompatibleInputsand CMOS-CompatibleOutputs Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise EPIC(Enhanced-PerformanceImplanted C

CDC2351

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications Operatesat3.3-VVCC LVTTL-CompatibleInputsandOutputs SupportsMixed-ModeSignalOperation (5-VInputandOutputVoltagesWith3.3-V VCC) DistributesOneClockInputtoTenOutputs OutputsHaveIn

CDC2351DB

丝印：CK2351；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications Operatesat3.3-VVCC LVTTL-CompatibleInputsandOutputs SupportsMixed-ModeSignalOperation (5-VInputandOutputVoltagesWith3.3-V VCC) DistributesOneClockInputtoTenOutputs OutputsHaveIn

CDC2351DB.B

丝印：CK2351；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications Operatesat3.3-VVCC LVTTL-CompatibleInputsandOutputs SupportsMixed-ModeSignalOperation (5-VInputandOutputVoltagesWith3.3-V VCC) DistributesOneClockInputtoTenOutputs OutputsHaveIn

CDC2351DBR

丝印：CK2351；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications Operatesat3.3-VVCC LVTTL-CompatibleInputsandOutputs SupportsMixed-ModeSignalOperation (5-VInputandOutputVoltagesWith3.3-V VCC) DistributesOneClockInputtoTenOutputs OutputsHaveIn

CDC2351DBR.B

丝印：CK2351；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

LowOutputSkew,LowPulseSkewfor Clock-DistributionandClock-Generation Applications Operatesat3.3-VVCC LVTTL-CompatibleInputsandOutputs SupportsMixed-ModeSignalOperation (5-VInputandOutputVoltagesWith3.3-V VCC) DistributesOneClockInputtoTenOutputs OutputsHaveIn