丝印：CDC318A；Package：SSOP；1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CDC318A；Package：SSOP；1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CDC318A；Package：SSOP；1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CDC318A；Package：SSOP；1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

文件：290.07 Kbytes 页数：16 Pages

TI

德州仪器

1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules) I2C Serial Interface Provides Individual Ena

文件：280.63 Kbytes 页数：15 Pages

TI

德州仪器

丝印：CDC319；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules) I2C Serial Interface Provides Individual Ena

文件：280.63 Kbytes 页数：15 Pages

TI

德州仪器

丝印：CDC319；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules) I2C Serial Interface Provides Individual Ena

文件：280.63 Kbytes 页数：15 Pages

TI

德州仪器

丝印：CDC319；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules) I2C Serial Interface Provides Individual Ena

文件：280.63 Kbytes 页数：15 Pages

TI

德州仪器

丝印：CDC319；Package：SSOP；1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules) I2C Serial Interface Provides Individual Ena

文件：280.63 Kbytes 页数：15 Pages

TI

德州仪器

CDC 3207G ARM7-Based Car Dashboard Controller

Introduction V1.0 The CDC 32xxG is a microcontroller for use in automotive applications. The on-chip CPU is an ARM™ processor ARM7TDMI™ with 32 bit data and address bus, which supports Thumb™ format instructions. The chip contains timer/counters, interrupt controller, multi channel A/D converter

文件：286.45 Kbytes 页数：2 Pages

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