High-Speed CMOS Logic 4-Bit Parallel Access Register

Features • Asynchronous Master Reset • J, K, (D) Inputs to First Stage • Fully Synchronous Serial or Parallel Data Transfer • Shift Right and Parallel Load Capability • Complementary Output From Last Stage • Buffered Inputs • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout

文件：665.93 Kbytes 页数：20 Pages

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德州仪器

High Speed CMOS Logic 4-Bit Parallel Access Register

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德州仪器

High-Speed CMOS Logic 4-Bit Parallel Access Register

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德州仪器

High-Speed CMOS Logic 4-Bit Parallel Access Register

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德州仪器

High-Speed CMOS Logic 4-Bit Parallel Access Register

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德州仪器

丝印：CD74HC195E；Package：PDIP；High-Speed CMOS Logic 4-Bit Parallel Access Register

Features • Asynchronous Master Reset • J, K, (D) Inputs to First Stage • Fully Synchronous Serial or Parallel Data Transfer • Shift Right and Parallel Load Capability • Complementary Output From Last Stage • Buffered Inputs • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout

文件：665.93 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD74HC195E；Package：PDIP；High-Speed CMOS Logic 4-Bit Parallel Access Register

Features • Asynchronous Master Reset • J, K, (D) Inputs to First Stage • Fully Synchronous Serial or Parallel Data Transfer • Shift Right and Parallel Load Capability • Complementary Output From Last Stage • Buffered Inputs • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout

文件：665.93 Kbytes 页数：20 Pages

TI

德州仪器

高速 CMOS 逻辑 4 位并行访问寄存器

The device is useful in a wide variety of shifting, counting and storage applications. It performs serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds.\n\n The two modes of operation, shift right (Q0-Q1) and parallel load, are controlled by the state of the • Asynchronous Master Reset\n• Fully Synchronous Serial or Parallel Data Transfer\n• Complementary Output From Last Stage\n• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25°C\n• Standard Outputs . . . . 10 LSTTL Loads\n• Wide Operating Temperature Range . . . –55°C to 125°C\n• Significant Power;

TI

德州仪器

丝印：HC195M；Package：SOIC；High-Speed CMOS Logic 4-Bit Parallel Access Register

Features • Asynchronous Master Reset • J, K, (D) Inputs to First Stage • Fully Synchronous Serial or Parallel Data Transfer • Shift Right and Parallel Load Capability • Complementary Output From Last Stage • Buffered Inputs • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout

文件：665.93 Kbytes 页数：20 Pages

TI

德州仪器

丝印：HC195M；Package：SOIC；High-Speed CMOS Logic 4-Bit Parallel Access Register

Features • Asynchronous Master Reset • J, K, (D) Inputs to First Stage • Fully Synchronous Serial or Parallel Data Transfer • Shift Right and Parallel Load Capability • Complementary Output From Last Stage • Buffered Inputs • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout

文件：665.93 Kbytes 页数：20 Pages

TI

德州仪器