丝印：CD4076BM；Package：SOIC；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

带三态控制的4路D型触发器

The CD4076 are quad D-type register with 3-state outputs. It operates over a recommended VDD power supply range of 3V to 15V referenced to GND (usually ground). Unused inputs must be connected to VDD, GND, or another input. • Supply voltage range:3V to 15V \n• Temperature range:-40℃ to +125℃\n• Packaging information: DIP16/SOP16/TSSOP16;

I-CORE

中微爱芯

CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

CMOS 4 -Bit D-Type Registers

Features • High Voltage Type (20V Rating) • Three State Outputs • Input Disabled Without Gating the Clock • Gated Output Control Lines for Enabling or Disabling the Outputs • Standardized Symmetrical Output Characteristics • 100 Tested for Quiescent Current at 20V • Maximum Input Current o

文件：357.99 Kbytes 页数：9 Pages

RENESAS

瑞萨

CMOS 4 -Bit D-Type Registers

Description CD4076BMS types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective fl

文件：78.54 Kbytes 页数：9 Pages

Intersil

CMOS 4-BIT D-TYPE REGISTERS

文件：218.7 Kbytes 页数：11 Pages

TI

德州仪器

CMOS 4-Bit D-type Registers

文件：566.59 Kbytes 页数：13 Pages

TI

德州仪器

CMOS 4-Bit D-type Registers

文件：566.59 Kbytes 页数：13 Pages

TI

德州仪器

CMOS 4-Bit D-type Registers

文件：566.59 Kbytes 页数：13 Pages

TI

德州仪器