CMOS 4-Bit D-Type Registers

文件：617.9 Kbytes 页数：13 Pages

SYC

丝印：CD4076BE；Package：PDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BE；Package：PDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BF；Package：CDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BF；Package：CDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BF3A；Package：CDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BF3A；Package：CDIP；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BM；Package：SOIC；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BM；Package：SOIC；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4076BM；Package：SOIC；CMOS 4-Bit D-Type Registers

Features: ® Three-stats outputs ® input disabled without gating the clock ® Gated output control lines for enabling or disabling the outputs ® Standardized, symmetrical output characteristics ® 100% tested for quiescent current at 20 V ® Maximum input current of 1 yA at 18 V over full

文件：524.26 Kbytes 页数：11 Pages

TI

德州仪器