CMOS QUAD D-TYPE FLIP-FLOP

文件：544.46 Kbytes 页数：14 Pages

TI

德州仪器

CMOS QUAD D-TYPE FLIP-FLOP

文件：544.46 Kbytes 页数：14 Pages

TI

德州仪器

CMOS Quad D-type Flip-Flop

文件：940.2 Kbytes 页数：18 Pages

TI

德州仪器

CMOS QUAD D-TYPE FLIP-FLOP

文件：544.46 Kbytes 页数：14 Pages

TI

德州仪器

CMOS Quad D-type Flip-Flop

文件：940.2 Kbytes 页数：18 Pages

TI

德州仪器

CMOS Quad D-type Flip-Flop

文件：940.2 Kbytes 页数：18 Pages

TI

德州仪器

CMOS 四路 D 类触发器

Cd40175B consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q\\ outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All four flip • 100% tested for quiescent current at 20 V\n• Noise margin (full package-temperature range) =         1 V at VDD = 5 V         2 V at VDD = 10 V      2.5 V at VDD = 15 V\n• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS ;

TI

德州仪器

CMOS 四路 D 类触发器

Cd40175B consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q\\ outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All four flip • 100% tested for quiescent current at 20 V\n• Noise margin (full package-temperature range) =         1 V at VDD = 5 V         2 V at VDD = 10 V      2.5 V at VDD = 15 V\n• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS ;

TI

德州仪器

CMOS Quad D Type Flip-Flop

Renesas

瑞萨

Package：16-DIP（0.300"，7.62mm）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：主复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 4BIT 16DIP

TI

德州仪器