丝印：CD40106B；Package：SOP；CD40106B CMOS Hex Schmitt-Trigger Inverters

1 Features 1• Schmitt-Trigger Inputs • Hysteresis Voltage (Typical): – 0.9 V at VDD = 5 V – 2.3 V at VDD = 10 V – 3.5 V at VDD = 15 V • Noise Immunity Greater Than 50% • No Limit On Input Rise and Fall Times • Standardized, Symmetrical Output Characteristics • For Quiescent Current at

文件：1.14479 Mbytes 页数：35 Pages

TI

德州仪器

丝印：CM0106B；Package：TSSOP；CD40106B CMOS Hex Schmitt-Trigger Inverters

1 Features 1• Schmitt-Trigger Inputs • Hysteresis Voltage (Typical): – 0.9 V at VDD = 5 V – 2.3 V at VDD = 10 V – 3.5 V at VDD = 15 V • Noise Immunity Greater Than 50% • No Limit On Input Rise and Fall Times • Standardized, Symmetrical Output Characteristics • For Quiescent Current at

文件：1.14479 Mbytes 页数：35 Pages

TI

德州仪器

丝印：CM0106B；Package：TSSOP；CD40106B CMOS Hex Schmitt-Trigger Inverters

1 Features 1• Schmitt-Trigger Inputs • Hysteresis Voltage (Typical): – 0.9 V at VDD = 5 V – 2.3 V at VDD = 10 V – 3.5 V at VDD = 15 V • Noise Immunity Greater Than 50% • No Limit On Input Rise and Fall Times • Standardized, Symmetrical Output Characteristics • For Quiescent Current at

文件：1.14479 Mbytes 页数：35 Pages

TI

德州仪器

丝印：CM0106B；Package：TSSOP；CD40106B CMOS Hex Schmitt-Trigger Inverters

1 Features 1• Schmitt-Trigger Inputs • Hysteresis Voltage (Typical): – 0.9 V at VDD = 5 V – 2.3 V at VDD = 10 V – 3.5 V at VDD = 15 V • Noise Immunity Greater Than 50% • No Limit On Input Rise and Fall Times • Standardized, Symmetrical Output Characteristics • For Quiescent Current at

文件：1.14479 Mbytes 页数：35 Pages

TI

德州仪器

Hex inverting Schmitt trigger

DESCRIPTION Each circuit of the HEF40106B functions as an inverter with Schmitt-trigger action. The Schmitt-trigger switches at different points for the positive and negative-going input signals. The difference between the positive-going voltage (VP) and the negative-going voltage (VN) is def

文件：208.53 Kbytes 页数：7 Pages

SYC

CMOS Dual 2 Input NAND Buffer/Driver

Description CD40107BMS is a dual 2 input NAND buffer/driver contain ing two independent 2 input NAND buffers with open drain single n-channel transistor outputs. This device features a wired OR capability and high output sink current capability (136mA typ. at VDD = 10V, VDS = 1V). Features

文件：57.44 Kbytes 页数：7 Pages

INTERSIL

CMOS Dual 2-Input NAND Buffer/Driver

Features: 32 times standard B-Series output current drive sinking capability — 136 mA typ. Vpp=10V,Vps=1V 100% tested for quiescent current at 20 V. Maximum input current of 1 uA at 18 over full package-temperature range; 100 nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratin

文件：1.1513 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CD40107BE；Package：PDIP；CMOS Dual 2-Input NAND Buffer/Driver

Features: 32 times standard B-Series output current drive sinking capability — 136 mA typ. Vpp=10V,Vps=1V 100% tested for quiescent current at 20 V. Maximum input current of 1 uA at 18 over full package-temperature range; 100 nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratin

文件：1.1513 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CD40107BE；Package：PDIP；CMOS Dual 2-Input NAND Buffer/Driver

Features: 32 times standard B-Series output current drive sinking capability — 136 mA typ. Vpp=10V,Vps=1V 100% tested for quiescent current at 20 V. Maximum input current of 1 uA at 18 over full package-temperature range; 100 nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratin

文件：1.1513 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CD40107BF；Package：CDIP；CMOS Dual 2-Input NAND Buffer/Driver

Features: 32 times standard B-Series output current drive sinking capability — 136 mA typ. Vpp=10V,Vps=1V 100% tested for quiescent current at 20 V. Maximum input current of 1 uA at 18 over full package-temperature range; 100 nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratin

文件：1.1513 Mbytes 页数：21 Pages

TI

德州仪器