型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
---|---|---|---|---|
丝印:aE2;Package:SOT765-1;Low-power dual 2-input NAND Schmitt trigger 1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO 文件:309.84 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:aE2;Package:SOT833-1;Low-power dual 2-input NAND Schmitt trigger 1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO 文件:309.84 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:AE2;Package:SMB;600 W Transient Voltage Suppressor 1. General description 600 W uni- and bi-directional Transient Voltage Suppressor (TVS) in a SMB Surface-Mounted Device (SMD) plastic package, designed for transient voltage protection. 2. Features and benefits • Rated peak pulse power at 10/1000 μs waveform: PPPM = 600 W • Reverse standoff 文件:229.55 Kbytes 页数:12 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:AE240;Package:SSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small- 文件:420.85 Kbytes 页数:16 Pages | TI 德州仪器 | TI | ||
丝印:AE240;Package:SSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small- 文件:420.85 Kbytes 页数:16 Pages | TI 德州仪器 | TI | ||
丝印:AE240;Package:TSSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small- 文件:420.85 Kbytes 页数:16 Pages | TI 德州仪器 | TI | ||
丝印:AE240;Package:TSSOP;OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small- 文件:420.85 Kbytes 页数:16 Pages | TI 德州仪器 | TI | ||
丝印:AE244;Package:SSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12 文件:412.15 Kbytes 页数:15 Pages | TI 德州仪器 | TI | ||
丝印:AE244;Package:SSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12 文件:412.15 Kbytes 页数:15 Pages | TI 德州仪器 | TI | ||
丝印:AE244;Package:TSSOP;OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12 文件:412.15 Kbytes 页数:15 Pages | TI 德州仪器 | TI |
详细参数
- 型号:
AE2
- 功能描述:
逻辑门 1.8V 2-INPUT NAND
- RoHS:
否
- 制造商:
Texas Instruments
- 产品:
OR
- 逻辑系列:
LVC
- 栅极数量:
2
- 线路数量(输入/输出):
2/1
- 高电平输出电流:
- 16 mA
- 低电平输出电流:
16 mA
- 传播延迟时间:
3.8 ns
- 电源电压-最大:
5.5 V
- 电源电压-最小:
1.65 V
- 最大工作温度:
+ 125 C
- 安装风格:
SMD/SMT
- 封装/箱体:
DCU-8
- 封装:
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
恩XP |
24+ |
标准封装 |
7270 |
全新原装正品/价格优惠/质量保障 |
询价 | ||
恩XP |
24+ |
VSSOP8 |
8000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
恩XP |
2016+ |
VSSOP8 |
9000 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
恩XP |
10+ |
MA |
6000 |
绝对原装自己现货 |
询价 | ||
恩XP |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
恩XP |
21+ |
6000 |
只做原装正品,卖元器件不赚钱交个朋友 |
询价 | |||
恩XP |
23+ |
标准封装 |
6000 |
正规渠道,只有原装! |
询价 | ||
恩XP |
23+ |
N/A |
6000 |
公司只做原装,可来电咨询 |
询价 | ||
恩XP |
24+ |
N/A |
20000 |
原装进口正品 |
询价 | ||
恩XP |
25+ |
SOT765 |
188600 |
全新原厂原装正品现货 欢迎咨询 |
询价 |
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