ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器

105 MSPS A/D Converter

文件：1.11656 Mbytes 页数：26 Pages

TI

德州仪器

ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

文件：390.15 Kbytes 页数：22 Pages

TI

德州仪器

Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

文件：570.06 Kbytes 页数：24 Pages

TI

德州仪器

双通道、12 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC)

The ADC12DC105 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). These converters use a differential, pipelined architecture with digital error correction and an on-chip s • Internal Sample-and-Hold Circuit and Precision Reference\n• Clock Duty Cycle Stabilizer\n• Power-Down Mode\n• 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)\n• High IF Sampling Receivers\n• Test and Measurement Equipment\n• Portable Instrumentation;

TI

德州仪器

丝印：12DC105CISQ；Package：WQFN；ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器

丝印：12DC105CISQ；Package：WQFN；ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器

丝印：12DC105CISQ；Package：WQFN；ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器

丝印：12DC105CISQ；Package：WQFN；ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器

丝印：12DC105CISQ；Package：WQFN；ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs

1FEATURES 2• Internal Sample-and-Hold Circuit and Precision Reference • Low Power Consumption • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation • Power-Down Mode • Offset Binary or 2's Complement Output Data Format • 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)

文件：668.82 Kbytes 页数：26 Pages

TI

德州仪器