ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器

High Performance Quad DVGA

1FEATURES 2• OIP3: 49dBm at 200MHz • Noise Figure: 8.5dB • Voltage Gain: 26dB • 1dB Gain Steps • Enable Pins Active in SPI Mode • −3dB Bandwidth of 1400 MHz • Gain Step Accuracy: 0.2 dB • Disable Function for Each Channel • Parallel and Serial Gain Control • Low Power Mode for Power Mana

文件：990.8 Kbytes 页数：33 Pages

TI

德州仪器

12-Bit, 65/80 MSPS A/D Converter

文件：451.12 Kbytes 页数：24 Pages

NSC

国半

65/80 MSPS A/D Converter

文件：1.32058 Mbytes 页数：32 Pages

TI

德州仪器

12 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC)

The ADC12C080 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-a • 1 GHz Full Power Bandwidth\n• Low Power Consumption\n• Clock Duty Cycle Stabilizer\n• Power-Down Mode\n• Resolution 12 Bits\n• SNR (fIN = 170 MHz) 68 dBFS (typ)\n• Full Power Bandwidth 1 GHz (typ)\n• Power Consumption 300 mW (typ);

TI

德州仪器

丝印：12C080；Package：WQFN；ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器

丝印：12C080；Package：WQFN；ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器

丝印：12C080；Package：WQFN；ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器

丝印：12C080；Package：WQFN；ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器

丝印：12C080；Package：WQFN；ADC12C080 12-Bit, 65/80 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch) APPLICAT

文件：895.93 Kbytes 页数：33 Pages

TI

德州仪器