Cascadable Amplifier 10 to 2000 MHz

文件：1.33564 Mbytes 页数：2 Pages

MA-COM

Cascadable Amplifier

文件：635.94 Kbytes 页数：3 Pages

MA-COM

D-SUB IDC MALE (DUAL U-SLOT)

文件：301.88 Kbytes 页数：1 Pages

DBLECTRO

Cascadable Amplifier 100 to 2000 MHz

文件：370.65 Kbytes 页数：2 Pages

MACOM

丝印：A36；Package：DO-214AA；Transient Voltage Suppressors (TVS) Data Sheet

Features For surface mounted applications in order to optimize board space Low profile package Built in strain relief Glass p assivated j unction Low inductance Excellent clamping capability 1000W peak pulse power capability at 10/1000 μ s waveform, r epetition r ate (duty cycle): 0.01

文件：1.58341 Mbytes 页数：7 Pages

SY

顺烨电子

丝印：A36；Package：DO-214AA；5.0 To 200V 1000W Surface Mount Transient Voltage Suppressors

Features Glass passivated chip 1000W peak pulse power capability with a 10/1000μs waveform Repetitive rate (duty cycle) : 0.01% Typical IR less than 1μA above 10V Excellent clamping capability Very fast response time High temperature soldering: 260℃/10s at terminals. RoHS compliant

文件：3.35517 Mbytes 页数：6 Pages

UNSEMI

优恩半导体

丝印：A36；Package：MSOP；OVP and EMI Protected, Precision, Low Noise and Bias Current Op Amps

FEATURES Low offset voltage: 60 μV maximum at 25°C (8-lead and 14-lead SOIC) Low offset voltage drift: 1 μV/°C maximum (8-lead and 14-lead SOIC) Low input bias current: 1 nA maximum at 25°C Low voltage noise density: 8 nV/√Hz typical at 1 kHz Large signal voltage gain (AVO): 100 dB minimum ov

文件：1.0819 Mbytes 页数：33 Pages

AD

亚德诺

丝印：A36；Package：MSOP；OVP and EMI Protected, Precision, Low Noise and Bias Current Op Amps

FEATURES Low offset voltage: 60 μV maximum at 25°C (8-lead and 14-lead SOIC) Low offset voltage drift: 1 μV/°C maximum (8-lead and 14-lead SOIC) Low input bias current: 1 nA maximum at 25°C Low voltage noise density: 8 nV/√Hz typical at 1 kHz Large signal voltage gain (AVO): 100 dB minimum ov

文件：1.0819 Mbytes 页数：33 Pages

AD

亚德诺

丝印：A36；Package：MSOP；OVP and EMI Protected, Precision, Low Noise and Bias Current Op Amps

FEATURES Low offset voltage: 60 μV maximum at 25°C (8-lead and 14-lead SOIC) Low offset voltage drift: 1 μV/°C maximum (8-lead and 14-lead SOIC) Low input bias current: 1 nA maximum at 25°C Low voltage noise density: 8 nV/√Hz typical at 1 kHz Large signal voltage gain (AVO): 100 dB minimum ov

文件：1.0819 Mbytes 页数：33 Pages

AD

亚德诺

丝印：A36；1000 WATT TVS COMPONENT

文件：454.73 Kbytes 页数：7 Pages

PROTEC