High Performance Low Skew 5 Output Clock

The IDT9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 25 to 133 MHz. • Zero input - output delay\n• High loop filter bandwidth ideal for Spread Spectrum applications\n• Skew controlled outputs\n• Available in 8 pin 150 mil SOIC or 173 mil TSSOP package.\n• 3.3V ±10% operation\n;

Renesas

瑞萨

Low Skew Output Buffer

General Description The ICS9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds fro

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ICST

深圳吉美

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TE Connectivity(泰科电子)

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伯恩斯

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