8V19N492数据手册集成电路(IC)的时钟发生器PLL频率合成器规格书PDF

厂商型号 |
8V19N492 |
参数属性 | 8V19N492 封装/外壳为88-VFQFN 裸露焊盘;包装为卷带(TR);类别为集成电路(IC)的时钟发生器PLL频率合成器;产品描述:VFQFPN 10.00X10.00X0.90 MM, 0.40 |
功能描述 | JESD204B/C Clock Jitter Attenuator |
封装外壳 | 88-VFQFN 裸露焊盘 |
制造商 | Renesas Renesas Technology Corp |
中文名称 | 瑞萨 瑞萨科技有限公司 |
数据手册 | |
更新时间 | 2025-8-8 9:20:00 |
人工找货 | 8V19N492价格和库存,欢迎联系客服免费人工找货 |
8V19N492规格书详情
描述 Description
The 8V19N492 is a fully integrated FemtoClock® NG jitter attenuator and clock synthesizer designed as a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards. The device is optimized to deliver excellent phase noise performance as required in GSM, WCDMA, LTE, and LTE-A radio board implementations. The device supports JESD204B subclass 0 and 1 clocks.
A two-stage PLL architecture supports both jitter attenuation and frequency multiplication. The first stage PLL is the jitter attenuator and uses an external VCXO for best possible phase noise characteristics. The second stage PLL locks on the VCXO-PLL output signal and synthesizes the target frequency.
The device supports the clock generation of high-frequency clocks from the selected VCO and low-frequency synchronization signals (SYSREF). SYSREF signals are internally synchronized to the clock signals. Delay functions exist for achieving alignment and controlled phase delay between system reference and clock signals and to align/delay individual output signals. The two redundant inputs are monitored for activity. Four selectable clock switching modes are provided to handle clock input failure scenarios. Auto-lock, individually programmable output frequency dividers, and phase adjustment capabilities are added for flexibility. The 8V19N492 is ideal for driving converter circuits in wireless infrastructure, radar/imaging, and instrumentation/medical applications. The device is a member of the high-performance clock family from IDT.
For information regarding evaluation boards and material, please contact your local sales representative.
特性 Features
• High-performance clock RF-PLL with support for JESD204B
• Optimized for low phase noise: -150dBc/Hz (800kHz offset; 245.76MHz clock)
• Integrated phase noise of 63fs RMS typical (12k–20MHz).
• Dual-PLL architecture
• 1st-PLL stage with external VCXO for clock jitter attenuation
• 2nd-PLL with internal FemtoClockNG PLL: 2949.12MHz
• For 3932.16MHz: see 8V19N492-39
• For 3686.4MHz: see 8V19N491-36
• For 2457.6MHz: see 8V19N490-24 and 8V19N491-24
• For 1966.08MHz: see 8V19N490-19
应用 Application
• Satellite Communications
• X-Band Radar
• Xilinx UltraScale+ RFSoC Gen 3 ZU4x 电源和时序
• 数字示波器中的时钟需求
技术参数
- 制造商编号
:8V19N492
- 生产厂家
:Renesas
- Inputs (#)
:2
- Input Freq (MHz)
:1.92 - 2000
- DPLL Channels (#)
:0
- JESD204B/C Compliant
:Yes
- Output Freq Range (MHz)
:18.432 - 2949.12
- Frequency Plan
:2949.12 / Output_Divider
- Output Skew (ps)
:0
- Adjustable Phase
:Yes
- Noise Floor (dBc/Hz)
:-160
- Phase Noise Supports GSM
:Yes
- Output Type
:LVDS
- Synthesis Mode
:Integer
- Input Ref. Divider Resolution (bits)
:12
- Feedback Divider Resolution (bits)
:12
- Output Divider Resolution (bits)
:8
- Supply Voltage (V)
:3.3
- Input Redundancy
:Auto-switch
- Advanced Features
:Holdover
- Pkg. Type
:VFQFPN
- Lead Count (#)
:88
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
Renesas |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
RENESAS |
24+ |
con |
35960 |
查现货到京北通宇商城 |
询价 | ||
RENESAS(瑞萨)/IDT |
2021+ |
VFQFPN-88(10x10) |
499 |
询价 | |||
RENESAS(瑞萨)/IDT |
24+ |
VFQFPN88(10x10) |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | ||
IDT |
24+ |
NA/ |
3261 |
原装现货,当天可交货,原型号开票 |
询价 | ||
RENESAS(瑞萨电子) |
22+ |
NA |
500000 |
万三科技,秉承原装,购芯无忧 |
询价 | ||
Renesas |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
询价 | ||
Renesas Electronics America In |
25+ |
88-VFQFN 裸露焊盘 |
9350 |
独立分销商 公司只做原装 诚心经营 免费试样正品保证 |
询价 | ||
RENESAS(瑞萨)/IDT |
2447 |
VFQFPN-88(10x10) |
315000 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
IDT |
23+ |
QFN |
50000 |
全新原装正品现货,支持订货 |
询价 |