丝印：854；Package：DFN3030-8B；N-Channel 30-V (D-S) MOSFET

文件：522.51 Kbytes 页数：5 Pages

LRC

乐山无线电

丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.46 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411AIL；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.46 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411ALF；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.95 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411ALF；Package：SOIC；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

文件：386.95 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：85411000；Package：SMA；Diode 600 V 1.5A Surface Mount DO-214AC, SMA

Features Controlled avalanche characteristic High average forward current Compliant to RoHS (exemp. 7a), REACH, Conflict Minerals 1)

文件：768.6 Kbytes 页数：3 Pages

DIOTEC

德欧泰克

丝印：85411000；Package：SMA；Diode 600 V 1.5A Surface Mount DO-214AC, SMA

Features Controlled avalanche characteristic High average forward current Compliant to RoHS (exemp. 7a), REACH, Conflict Minerals 1)

文件：768.6 Kbytes 页数：3 Pages

DIOTEC

德欧泰克

丝印：8541Y；Package：TQFP；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器

丝印：8541Y；Package：TQFP；16-BIT, SINGLE CHANNEL, PARALLEL INPUT DIGITAL-TO-ANALOG CONVERTER WITH RAIL-TO-RAIL VOLTAGE OUTPUT

FEATURES Micropower Operation: 250 μA at 5 V AVDD Power-On Reset to Min-Scale 16-Bit Monotonic Settling Time: 10 μs to ±0.003% FSR 16-Bit Parallel Interface On-Chip Output Buffer Amplifier With Rail-to-Rail Operation Hardware Reset to Min-Scale or Mid-Scale Double-Buffered Architectur

文件：626.22 Kbytes 页数：25 Pages

TI

德州仪器