8-bit serial-in/serial-out or parallel-out shift register with output latches

General description The 74VHC595; 74VHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74VHC595; 74VHCT595 are 8-stage serial shift registers with a storage register and 3-state out

文件：246.75 Kbytes 页数：22 Pages

恩XP

8-bit serial-in/serial-out or parallel-out shift register with output latches

1. General description The 74VHC595; 74VHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74VHC595; 74VHCT595 are 8-stage serial shift registers with a storage register and 3-state

文件：302.37 Kbytes 页数：20 Pages

NEXPERIA

安世

8-bit serial-in/serial-out or parallel-out shift register with output latches

文件：786.12 Kbytes 页数：21 Pages

NEXPERIA

安世

8-bit serial-in_serial-out or parallel-out shift register

The 74VHC595; 74VHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.\n The 74VHC595; 74VHCT595 are 8-stage serial shift registers with a storage register and 3-state outputs. The shift reg • Balanced propagation delays\n• All inputs have Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• The 74VHC595 operates with CMOS input level\n• For 74VHCT595 operates with TTL input level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exc;

Nexperia

安世

8-bit serial-in/serial-out or parallel-out shift register with output latches

The 74VHC595-Q100; 74VHCT595-Q100 are high‑speed Si‑gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No.7A.\n The 74VHC595-Q100; 74VHCT595-Q100 are 8‑stage serial shift registers with a storage register and 3-state out • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• The 74VHC595-Q100 operates with CMOS;

Nexperia

安世

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：串行至并行，串行 类别：集成电路（IC） 移位寄存器 描述：IC SHIFT REG 8BIT SISO 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 功能：串行至并行，串行 类别：集成电路（IC） 移位寄存器 描述：IC SHIFT REG 8BIT SISO 16TSSOP

Nexperia USA Inc.