Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：70.55 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：269.72 Kbytes 页数：9 Pages

Fairchild

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Dual J-K Flip-Flops with Preset and Clear

文件：350.77 Kbytes 页数：11 Pages

ONSEMI

安森美半导体

Dual J-K Flip-Flops with Preset and Clear

文件：268.77 Kbytes 页数：9 Pages

Fairchild

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带预设和清零功能的双通道J-K触发器

VHC112是一款采用硅栅极CMOS技术制造的先进的高速CMOS反相器。 它实现了与等效双极型肖特基TTL相似的高速运行，同时保持了CMOS低功耗。 VHC112包含两个独立的高速JK触发器，带方向设置和清零输入。 同步状态变化由时钟下降边沿初始化。 触发发生在时钟的某一个电平，并非与转换时间直接相关。 J和K输入在时钟的任一状态都能变化，不影响触发器，前提是这两个值处于推荐的设置和与时钟下降边沿相关的保持时间要求的状态。 PR或CLR上的低电平信号阻止计时，分别将Q和Q#强制为高电平。 PR和CLR上同时出现的低电平将Q和Q#都强制为高电平。 输入保护电路确保0V至7V可应用于输入引脚，无需 •高速： fMAX = 200 MHz（典型值），TA = 5.0V时\n•低功耗： TA = 25°C时，ICC = 2 µA（最大值）\n•高抗噪能力： VNIH = VNIL = 28% VCC （最小值）\n•所有输入上都提供掉电保护\n•引脚和功能与74HC112兼容;

ONSEMI

安森美半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：70.55 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：70.55 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：269.72 Kbytes 页数：9 Pages

Fairchild

仙童半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：70.55 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Dual J-K Flip-Flops with Preset and Clear

General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■ High speed: fMAX = 200 MHz (typ) a

文件：70.55 Kbytes 页数：7 Pages

Fairchild

仙童半导体