25-BIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST

文件：1.51591 Mbytes 页数：37 Pages

TI

德州仪器

25-BIT CONFIGURABLE REGISTERED BUFFER WITH ADDRESS-PARITY TEST

文件：1.51591 Mbytes 页数：37 Pages

TI

德州仪器

25-Bit Configurable Registered Buffer w/Address-Parity Test

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation. In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.\nAll • Member of the Texas InstrumentsWidebus+™ Family\n• Pinout Optimizes DDR2 DIMM PCB Layout\n• Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer \n• Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption\n• Output Edge-Control Circuitry Minimizes ;

TI

德州仪器

Package：96-LFBGA；包装：卷带（TR） 类别：集成电路（IC） 专用逻辑器件 描述：IC CONFIG REG BUFF 25BIT 96-BGA

TI2

德州仪器