16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-state

DESCRIPTION The 74LVC(H)162373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CM

文件：88.07 Kbytes 页数：17 Pages

PHI

飞利浦

16-bit D-type transparent latch; 30 Ω series termination resistors; 5 V tolerant inputs/outputs; 3-state

1. General description The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with 30 Ω termination resistors and 3-state outputs. The 74LVCH162373A has separate D-type inputs with bus hold for each latch. Both devices can be used as two 8-bit transparent latches or a single 1

文件：246.02 Kbytes 页数：14 Pages

NEXPERIA

安世

16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-state

DESCRIPTION The 74LVC(H)162373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CM

文件：88.07 Kbytes 页数：17 Pages

PHI

飞利浦

16-bit D-type transparent latch; 30 Ω series termination resistors; 5 V tolerant inputs/outputs; 3-state

1. General description The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with 30 Ω termination resistors and 3-state outputs. The 74LVCH162373A has separate D-type inputs with bus hold for each latch. Both devices can be used as two 8-bit transparent latches or a single 1

文件：246.02 Kbytes 页数：14 Pages

NEXPERIA

安世

16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-state

DESCRIPTION The 74LVC(H)162373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CM

文件：88.07 Kbytes 页数：17 Pages

PHI

飞利浦

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

文件：412.54 Kbytes 页数：7 Pages

RENESAS

瑞萨

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

文件：412.54 Kbytes 页数：7 Pages

RENESAS

瑞萨

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件：223.8 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件：223.8 Kbytes 页数：6 Pages

IDT

3.3V CMOS 16-Bit Transparent D-Type Latch with 3-State Outputs, 5.0V Tolerant I/O, and Bus-Hold

The 74LVCH162373A 16-bit high-speed, low power transparent D-type latch is ideal for temporary storage of data. All pins of the 74LVCH162373A can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH162373A has \"bus •Typical tSK(o) (Output Skew) < 250ps\n• ESD > 2000V per MIL-STD-883, Method 3015\n• > 200V using machine model (C = 200pF, R = 0)\n• VCC = 3.3V ± 0.3V, Normal Range\n• VCC = 2.7V to 3.6V, Extended Range\n• CMOS power levels (0.4 uW typ. static)\n• All inputs, outputs, and I/O are 5V tolerant\n• Ava;

Renesas

瑞萨